The 3nd Workshop on
Parallel Execution of Sequential Programs on Multi-core Architectures

(PESPMA 2010) Full Workshop Proceedings

June 20th, 2010   Saint-Malo, France


Final Program


8:25 – 8:30am Welcome


8:30 – 9:30am Keynote I:  

Session Chair: Tin-Fook Ngai (Intel Labs)


Automatic Parallelization in GCC: for Research and for Real [Slides]

Albert Cohen (INRIA)


9:30 – 10:00am


Parallel Continuation-Passing Style - A Compiler Representation for Incremental Parallelization

Christoph M. Angerer and Thomas R. Gross (ETH Zurich)


10:00 – 10:30am Coffee Break


10:30am – 12:30pm Session I: Speculative Execution

Session Chair: James Tuck (North Carolina State University)


Semantic information based speculative parallel execution

Andras Vajda (Ericsson) and Per Stenström (Chalmers University of Technology)


Supporting Application-Specific Speculation with Competitive Parallel Execution

Oliver Trachsel and Thomas Gross (ETH Zurich)


ReFLEX: Block Atomic Execution on Conventional ISA Cores

Mark Gebhart (The University of Texas at Austin) and Stephen W. Keckler (NVIDIA / The University of Texas at Austin)


FaulTM: Fault-Tolerance Using Hardware Transactional Memory

Gulay Yalcin, Osman Unsal, Ibrahim Hur, Adrian Cristal and Mateo Valero (Barcelona Supercomputing Center)


12:30 – 2:00 pm Lunch


2:00 – 3:00 pm Keynote II:

Session Chair: Scott Mahlke (University of Michigan)


Sequential Execution of Parallel Programs :). Threads Should not Play Dice. [Slides]

Luis Ceze (University of Washington)


3:00 – 3:30 pm


Design Trade-offs for Memory Level Parallelism on a Asymmetric Multicore System

George Patsilaras, Niket K. Choudhary and James Tuck (North Carolina State University)


3:30 – 4:00pm Coffee Break


4:00 – 5:30pm Session II: Parallelization and Energy Efficiency

Session Chair: Neil Vachharajani (Google)


The Potential of Synergistic Static, Dynamic and Speculative Loop Nest Optimizations for Automatic Parallelization

Riyadh Baghdadi, Albert Cohen (INRIA), Cedric Bastoul (Paris-Sud University), Louis-Noel Pouchet (Ohio State University) and Lawrence Rauchwerger (Texas A&M University)


Enabling Parallelization via a Reconfigurable Chip Multiprocessor

Matthew A Watkins and David Albonesi (Cornell University)


Energy Efficiency via the N-way Model

Romain Cledat and Santosh Pande (Georgia Institute of Technology)